This invention relates to a method of producing a cylindrical storage node of a capacitor on a semiconductor substrate. In most cases the capacitor is the main component of a memory cell.
In conventional DRAMs, each memory cell consists of a capacitor and a MOS transistor for switching. This memory cell is simple in construction and can be made relatively small in memory cell area.
A voltage that can be taken out of the memory cell is proportional to the storage capacitance of the capacitor. For high density DRAMs it is necessary to obtain a sufficiently large storage capacitance in a small cell area. In this regard it is prevailing to employ stacked capacitor cells in which a capacitor is stacked over the bit line or word line to reduce the cell area. Usually the stacked capacitor has a curved shape to further increase storage capacitance in a given plane area.
For further enhancement of the density of DRAM cells with further reduction in memory cell area, there is a proposal of a stacked capacitor cell having a cylindrical capacitor: 1989 VLSI Symposium, pp. 69-70. The storage node of the cylindrical capacitor has a hollow cylinder of polysilicon (polycrystalline silicon) which stands vertically on the substrate surface, and both the inner and outer surfaces of the cylinder are used as a capacitor area. With this structure the storage capacitance can be increased with decreasing cell area. The storage capacitance increases with height of the cylinder. For further increase in storage capacitance, the storage node may have two (or more) hollow cylinders which are arranged concentrically and slightly spaced from each other.
The fabrication of the cylindrical capacitor requires a larger number of process steps than the fabrication of conventional stacked capacitors. In the case of a capacitor in the shape of double (or multiple) cylinder the process steps further increase (as will be described hereinafter), and it is difficult to form the outer cylinder with the same height as the inner cylinder.
In this connection, JP-A 5-347392 proposes a relatively simple method for forming a cylindrical or ring-like storage node of a capacitor. This method uses a phase-shifting technique in photolithography to form the storage node. A positive photoresist is applied to a conductor layer (usually polysilicon) which is formed on a substrate surface to form the storage node, and the photoresist layer is exposed to light through a transparent reticle having a phase-shifter which causes phase inversion (180-degree phase shifting) of transmitted light. The shape and size of the phase shifter corresponds to the whole area of the aimed storage node. In a ring-like region below the periphery of the phase-shifter, a shadow is cast by the interference between the phase-inverted light and uninverted light. As a result, the photoresist layer is patterned to a ring-like shape. Using the patterned photoresist as mask, the conductor layer is etched to leave a ring-like part which becomes the storage node. In the case of forming a storage node in the shape of double cylinder, an oxide layer on a conductor layer is cylindrically patterned by using the phase-inverting photolithographic technique, and sidewalls of a conductor are formed on the inner and outer surfaces of the oxide cylinder, followed by removal of the oxide cylinder by etching.
This method is relatively small in the number of process steps. However, the use of the phase-inverting reticle offers inconvenience and entails high cost.